The present invention relates to methods and apparatus for depositing and planarizing a layer of a material on a substrate surface. Methods and apparatus according to preferred aspects of the invention are particularly useful in fabrication of microelectronic devices.
Microelectronic devices ordinarily incorporate layered structures which include microscopic electronic elements and a generally planar layer of insulating material covering these elements. In manufacture of such devices, the layer of insulating material may be formed with small holes and a layer of metal is deposited on top of the insulating layer so that metal extends into the hole to contact the electronic elements. The metal layer is then etched to form separate leads extending to the various electronic elements. Typically, the metal is deposited from the gas phase onto the insulating layer, as by evaporation, gas phase reaction processes or, most typically, by sputtering.
In sputtering, ions are impelled against the sputter source or "target" to dislodge atoms of the source, referred to as "adatoms," which then deposit on the substrate to be coated and form the layer. Ordinarily, the process is conducted under very low subatmospheric pressure by creating a plasma or mixture of gas ions and free electrons and directing the ions towards the sputter source under the influence of an electric field. The electric field typically is created either by applying a negative DC voltage or a radio frequency ("RF") excitation signal to the sputter source. Where RF excitation is applied to the sputter source, the sputter source also becomes negatively charged because the interface between the plasma and the sputter source acts as a rectifier. RF sputtering is almost universally conducted with RF excitations at 13.56 MHz, a so-called "ISM" frequency, and at other, higher, ISM frequencies. Regulations governing stray radio frequency emission from the apparatus are far less than stringent for the ISM (industrial, scientific and medical) frequencies than for other frequencies.
The metal deposited may not completely fill the holes in the insulating layer and hence may not provide reliable conductive pathways in the finished device. Because the total surface area of a hole is greater than the area of the opening of the hole in the plane of the insulating layer top surface, the average amount of material deposited in the hole per unit of surface area is less than that deposited on the planar top surface. Moreover, the material deposited adjacent the opening tends to mask the deeper portions of the hole walls, leading to particularly poor coverage of the walls and formation of voids and undercuts in the deposited material. The top surface of the metallic layer, remote from the insulating layer ordinarily has an irregularity or depression in the region overlying the original hole in the insulating layer. Such irregularities tend to create even more severe irregularities as further layers are deposited on the metallic layer during device fabrication. The voids or undercuts created by unequal deposition also cause processing problems in later fabrication steps. Problems of incomplete filling and irregular top surface configuration similar to those encountered with holes occur in the case of other non-planar features such as grooves in a layer to be covered by a gas-phase deposited layer. These problems also occur in depositing layers of materials other than metals.
These problems have become particularly acute with continued progress in other areas of microelectronic manufacture and design. All of these problems are aggravated as the size of features such as holes and grooves decreases and as the severity of the layer topography increases, i.e., as the walls of holes, grooves and the like in a substrate layer to be covered become more nearly perpendicular to the plane of the substrate layer. However, to provide further miniaturization of semiconductor devices, it is necessary to use progressively smaller holes, grooves and the like, and to employ progressively more severe layer topography. Thus, the problems noted above have posed a significant impediment to progress in microelectronics.
The art has therefore sought processes which can "planarize" a deposited layer, i.e., which can cause the layer to more completely fill holes and depressions in the underlying substrate layer and which provide a smoother top surface on the deposited layer. It has been known heretofore that planarization can be achieved by simply melting the deposited metallic or other layer. For example, in sputtering processes, considerable energy can be transferred to the metal or other sputter-deposited layer as adatoms of the sputtered material merge with the layer. The major portion of this energy typically is converted to heat. The temperature of the entire layer may rise above the solidus temperature of the sputtered material (the lowest melting temperature), so that bulk flow of the material occurs. Such bulk flow effectively fills holes and provides a flat top surface on the sputtered layer. However, unwanted effects such as segregation of elements from alloy layers, growth of metallic grains within the layer, heat damage to underlying electronic elements and the like render melting undesirable in most semiconductor application.
Other approaches which have been proposed rely upon ion bombardment and/or "resputtering" of the deposited layer in a sputtering process. Thus, as disclosed in Homma et al., Planar Deposition of Aluminum by RF/DC Sputtering with RF Bias, J. Electro-Chemical Soc. VOL. 132, No. 6, pp. 1466-1472 (1985), RF excitation may be applied to the substrate as well as to the target or sputter source during deposition of an aluminum layer by sputtering. Just as in conventional sputtering, RF excitation has been applied in resputtering at a frequency of about 13.56 MHz. In effect, the metallic layer deposited on the substrate surface, becomes another sputter source or target. Ions from the plasma impact upon the layer and dislodge atoms of the deposited metal from the top surface of the layer. Some of the dislodged material tends to fill the holes or other surface irregularities, and to fill in low spots on the deposited layer.
At least some of the adverse effects of the melting procedure are avoided or mitigated using the resputtering approach. However, the resputtering effect markedly slows the metal deposition process. Thus, while some metal is being deposited in the layer by the principal sputtering process, some is removed by the resputtering process. To achieve good planarization with even a moderate substrate layer topography, a resputtering rate of about 50% to about 70% is considered necessary. Stated another way, 50% of the metal deposited in a given time is lost by resputtering. Thus, the net rate of deposition is dramatically reduced, and productivity of the sputtering equipment is severely curtailed. Moreover, the ions bombarding the layer tend to heat it. To keep the total heat input to the layer within bounds and avoid melting the layer, the heat input supplied by sputtered adatoms must be reduced to compensate for this effect. Thus, the principal sputtering rate itself must be less than that used without resputtering. This factor, coupled with the losses caused by resputtering, results in a net deposition rate of about 10% or less than that achievable without resputtering. Stated another way, process time and hence process cost are increased tenfold with this RF resputtering approach.
A further approach, taught by Skelly et al., J. Vac. Sci. Technol. A, Vol. 4, No. 3, pp. 457-460 (May/June 1986), is the application of a DC bias to the substrate, also while the substrate is in proximity with a plasma in a sputtering process. The DC bias also causes bombardment of the layer by ions from the plasma. This is said to result in some degree of planarization. However, the planarizing effects occur principally after the process has operated for a considerable period of time, thereby indicating that the planarizing effects are caused at least in part by heat generated within the layer during the process. It therefore appears that the DC bias process involves bulk melting of the layer material and hence shares certain disadvantages associated with the simple melting process referred to above. The ion flux or number of bombarding ions per unit area with DC bias will necessarily be limited by the "Langmuir effect," thereby impairing the efficacy of the process. Moreover, the DC bias process typically induces some resputtering as well, typically to a resputtering rate of about 10% to about 30%. Therefore, the DC bias process considerably reduces productivity of the sputtering operation and increases its cost.
Accordingly, there has been an acute, unmet need in the art for improvements in layer depositing and planarizing processes and apparatus.